Building a Multi-Target Compiler Backend Without LLVM

I’m Building a Multi-Target Compiler Backend from Scratch — No LLVM, No Crutches

Engineer Gideon Towolawi is developing a custom compiler backend toolkit using C++ without relying on existing frameworks like LLVM. The project aims to support architectures ranging from x86-64 to SPIR-V while implementing security-hardened features and explicit SIMD vectorization.

Why This Matters

Standard infrastructures like LLVM, while powerful, contain over 4 million lines of code, often leading to performance trade-offs and reduced visibility for specialized optimizations. By building from scratch, engineers can implement fine-grained SIMD width selection and constant-time crypto primitives that are difficult to enforce in generic backends.

This approach prioritizes codebase ownership and the ability to implement specific security obfuscation passes like control flow flattening and opaque predicates. Such control is critical for systems where security and hardware-specific efficiency are the primary requirements over development speed.

Key Insights

• Multi-stage IR pipeline: The system lowers Source to SSMOL (High-level IR) and then to MREL (Low-level IR) for target-agnostic processing.
• MREL register management: This LIR handles virtual registers and stack slots without assuming physical register names, deferring that to target-specific backends.
• Security-focused codegen: The backend integrates control flow flattening and opaque predicates directly into the compilation process.
• SIMD explicit types: The hand-written recursive descent parser supports explicit vector types including v128, v256, and v512 for manual hardware optimization.
• LLVM scalability challenges: LLVM’s 4-million-line codebase is cited as a primary reason for building a custom solution to ensure full codebase understanding.

Working Examples

The multi-stage compilation pipeline for lowering source code to machine-specific instructions.

Source → Parser → AST → SSMOL (HIR) → MREL (LIR) → x86-64 / SPIR-V / ARM64 / RISC-V / WASM

Practical Applications

• Use case: Implementing constant-time crypto primitives with secret register annotations to prevent side-channel attacks. Pitfall: Using generic backends that may optimize away security-critical timing constraints.
• Use case: Generating SPIR-V compute kernels from a C++-like language for high-performance graphics and GPGPU workloads. Pitfall: Complexity in managing target-agnostic IR across wildly different hardware architectures.
• Use case: Security obfuscation for sensitive binaries using control flow flattening. Pitfall: Significant performance overhead if obfuscation passes are not fine-tuned per target.

References:

• https://dev.to/ayndlr/im-building-a-multi-target-compiler-backend-from-scratch-no-llvm-no-crutches-57be
• https://github.com/ayndlr